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1 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 1.0 features ? can be used in designs presently using the sym20c15 ? single-chip, half-duplex 1200 bits per second fsk modem? bell 202 shift frequencies of 1200hz and 2200hz ? 3.3v - 5.0v power supply ? transmit-signal wave shaping ? receive band-pass filter ? low power: optimal for intrinsically safe applications ? cmos compatible ? internal oscillator requires 460.8khz crystal or ceramic resonator ? meets hart physical layer requirements ? industrial temperature range of -40c to +85c ? available in 28-pin plcc and 32-pin lqfp packages 2.0 description the A5191HRT is a single-chip, cmos modem for use in highway addressable remote transducer (hart) field instruments and masters. the modem and a few external passive components provide all of the functions needed to satisfy hart physical layer requirements including modulation, demodulation,receive filtering, carrier detect, and transmit-signal shaping. the A5191HRT is pin-compatible with the sym20c15. see the pin description and functional description sections for details on pin compatibility with the sym20c15. the A5191HRT uses phase continuous frequency shift keying (fsk) at 1200 bits per second. to conserve power the receive circuits are disabled during transmit operations and vice versa. this provides the half-duplex operation used in hart communications. figure 1: 28-pin plcc pinout diagrams (green & non-green) figure 2: 32-pin lqfp pinout diagrams (green & non-green)
2 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet table 1: pinout summary 28-pin plcc, A5191HRTp/pg (12197-504/508) p p i i n n n n o o . . s s i i g g n n a a l l n n a a m m e e t t y y p p e e p p i i n n d d e e s s c c r r i i p p t t i i o o n n 1 test1 input connect to v ss 2 test2 - no connect 3 test3 - no connect 4 test4 - no connect 5 test5 input connect to v ss 6 inreset input reset all digital logic when low 7 test7 input connect to v ss 8 test8 input connect to v ss 9 test9 input connect to v ss 10 otxa output output transmit analog, fsk modulated hart transmit signal to 4-20ma loop interface circuit 11 iaref input analog reference voltage 12 icdref input carrier detect reference voltage 13 ocbias output comparator bias current 14 test10 input connect to v ss 15 vdda power analog supply voltage 16 irxa input fsk modulated hart receive signal from 4-20ma loop interface circuit 17 orxaf output analog receive filter output 18 irxac input analog receive comparator input 19 oxtl output crystal oscillator output 20 ixtl input crystal oscillator input 21 vss ground ground 22 vdd power digital supply voltage 23 inrts input request to sent 24 itxd input input transmit date, transmitted hart data stream from uart 25 test11 - no connect 26 orxd output received demodulated hart data to uart 27 ocd output carrier detect output 28 test12 - no connect table 2: pinout summary 32-pin lqfp, A5191HRTl/lg (12197-503/507) p p i i n n n n o o . . s s i i g g n n a a l l n n a a m m e e t t y y p p e e p p i i n n d d e e s s c c r r i i p p t t i i o o n n 1 test5 input connect to v ss 2 inreset input reset all digital logic when low, connect to v dd for normal operation 3 test7 input connect to v ss 4 test8 input connect to v ss 5 test9 input connect to v ss 6 vss ground digital ground 7 otxa output output transmit analog, fsk modulated hart transmit signal to 4-20ma loop interface circuit 8 iaref input analog reference voltage 9 icdref input carrier detect reference voltage 10 ocbias output comparator bias current 11 test10 input connect to v ss 12 vssa ground analog ground 13 vdda power analog supply voltage 14 irxa input fsk modulated hart receive signal from 4-20ma loop interface circuit 15 orxaf output analog receive filter output 16 irxac input analog receive comparator input 17 oxtl output crystal oscillator output 18 ixtl input crystal oscillator input 19 vssa ground analog ground 20 vss ground digital ground 21 vdd power digital supply voltage 22 inrts input request to send 23 itxd input input transmit data, transmitted hart data stream from uart 24 test11 - no connect 25 orxd output received demodulated hart data to uart 26 ocd output carrier detect output 27 test12 - no connect 28 test1 input connect to v ss 29 test2 - no connect 30 vdd power digital supply voltage 31 test3 - no connect 32 test4 - no connect
3 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 3.0 pin descriptions s s y y m m b b o o l l p p i i n n n n a a m m e e d d e e s s c c r r i i p p t t i i o o n n iaref analog reference voltage analog input sets the dc operating point of the operational amplifiers and comparators and is usually selected to split the dc potential between v dd and v ss . see iaref in dc characteristics, table 6 icdref carrier detect reference voltage analog input controls at which level the carrier detect (ocd) becomes active. this is determined by the dc voltage difference between icdref and iaref. selecting icdref - iaref equal to 0.08 v dc will set the carrier detect to a nominal 100 mv p-p inreset reset digital logic when at logic low (v ss ) this input holds all the digital logic in reset. during normal operation inreset should be at v dd . inreset should be held low for a minimum of 10ns after v dd = 2.5v as shown in figure 3 inrts request to send active-low input selects the operation of the modulator. otxa is enabled when this signal is low. this signal must be held high during power-up irxa analog receive input input accepts the 1200/2200hz signals from the external filter irxac analog receive comparator input positive input of the carrier detect comparator and the receiver filter comparator itxd digital transmit input (cmos) input to the modulator accepts digital data in nrz form. when itxd is low, the modulator output frequency is 2200hz. when itxd is high, the modulator output frequency is 1200hz. ixtl oscillator input input to the internal oscillator must be connected to a parallel mode 460.8khz ceramic resonator when using the internal oscillator or grounded when using an external 460.8khz clock signal ocbias comparator bias current the current through this output controls the operating parameters of the internal operational amplifiers and comparators. for normal operation, ocbias current is set to 2.54a. ocd carrier detect output output goes high when a valid input is recognized on irxa. if the received signal is greater than the threshold specified on icdref for four cycles of the irxa signal, the valid input is recognized. orxaf analog receive filter output signal is the square wave output of the receiver high-pass filter orxd digital receive output (cmos) signal outputs the digital receive data. when the received signal (irxa) is 1200hz, orxd outputs logic high. when the received signal (irxa) is 2200hz, orxd outputs logic low. orxd is qualified internally with ocd. otxa analog transmit output output provides the trapezoidal signal controlled by itxd. when itxd is low, the output frequency is 2200hz. when itxd is high, the output frequency is 1200hz. this output is active when inrts is low and 0.5 v dc when inrts is high. oxtl oscillator output output from the internal oscillator must be connected to an external 460.8khz clock signal or to a parallel mode 460.8khz ceramic resonator when using the internal oscillator test(12:1) factory test factory test pins; for normal operation, tie these signals as per table 1 and table 2 vdd digital power power for the digital modem circuitry vdda analog supply voltage power for the analog modem circuitry vss ground analog and digital ground vssa analog ground table 3: pin descriptions figur e 3: reset t iming note: this signal is also present on the lsi 20c15. it is labeled as test6. the 20c15 data sheet mentions the reset function of this pin but does not emphasize its use to reset the chip. reliable operationof the modem requires a hardware reset as shown in figure 3. this is true for the amis 12197-503 and 12197-504 as well as the lsi 20c15.
4 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 4.0 functional description the A5191HRT is a functional equivalent of the sym20c15 hart modem. it contains a transmit data modulator and signal shaper, carrier detect circuitry, analog receiver and demodulator circuitry and an oscillator, as shown in figure 4. the internal hart modem modulates the transmit-signal and demodulates the receive signal. the transmit-signal shaper enables the A5191HRT to transmit a hart compliant signal. the carrier is detected by comparing the receiver filter output with the difference between two external voltage references. theanalog receive circuitry band-pass filters the received signal for input to the modem and the carrier detect circuitry. the oscillator provides the modem with a stable time base using either a simple external resonator or an external clock source. figur e 4: A5191HRT block diagram 4 4 . . 1 1 a a 5 5 1 1 9 9 1 1 h h r r t t l l o o g g i i c c the modem consists of a modulator and demodulator. the modem uses shift frequencies of nominally 1200hz (for a 1) and 220hz (for a 0). the bit rate is 1200 bits/second. the modulator accepts digital data in nrz form at the itxd input and generates the fsk modulated signal at the otxa output. inrts must be a logic low for the modulator to be active. the demodulator accepts an fsk signal at the irxa input and reproduces the original modulating signal at the orxd output. the nominal bit rate is 1200 bits per second. figure 5 illustrates the demodulation process. 4.1.1 modulator 4.1.2 demodulator figure 5: demodulator signal timing
5 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet the output of the demodulator is qualified with the carrier detect signal (ocd), therefore, only irxa signals large enough to be detected (100mv p-p typically) by the carrier detect circuit produce received serial data at orxd. maximum demodulator jitter is 12 percent of one bit given input frequencies within hart specifications, a clock frequency of 460.8khz (1.0 percent) and zero input (irxa) asymmetry. 4 4 . . 2 2 t t r r a a n n s s m m i i t t - - s s i i g g n n a a l l s s h h a a p p e e r r the transmit-signal shaper generates a hart compliant fsk modulated signal at otxa. figure 6 and figure 7 show the transmit-signal forms of the A5191HRT. for iaref = 1.235 v dc , otxa will have a voltage swing from approximately 0.25 to 0.75 v dc . figure 6: otxa waveform (1200hz) figur e 7: otxa w aveform (2200hz) 4 4 . . 3 3 c c a a r r r r i i e e r r d d e e t t e e c c t t c c i i r r c c u u i i t t r r y y the carrier detect comparator shown in figure 8 generates logic low output if the irxac voltage is below icdref. the comparator output is fed into a carrier detect block (see figure 4). the carrier detect block drives the carrier detect output pin ocd high if inrts is high and four consecutive pulses outof the comparator have arrived. ocd stays high as long as inrts is high and the next comparator pulse is received in less than 2.5ms. once ocd goes inactive, it takes four consecutive pulses out of the comparator to assert ocd again. four consecutive pulses amount to 3.33ms when the received signal is 1200hz and to 1.82ms when the received signal is 2200hz. 4 4 . . 4 4 a a n n a a l l o o g g r r e e c c e e i i v v e e r r c c i i r r c c u u i i t t r r y y 4.4.1 voltage references the A5191HRT requires two voltage references, iaref and icdref. iaref sets the dc operating point of the internal operational amplifiers and comparators. a 1.235 v dc reference (analog devices ad589) is suitable as iaref. the level at which ocd (carrier detect) becomes active is determined by the dc voltage difference (icdref - iaref). selecting a voltage difference of 0.08 v dc will set the carrier detect to a nominal 100 mv p-p .
6 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 4.4.2 bias current resistor the A5191HRT requires a bias current resistor to be connected between ocbias and v ss . the bias current controls the operating parameters of the internal operational amplifiers and comparators. the value of the bias current resistor is determined by the reference voltage iaref and the following formula: the recommended bias current resistor is 500k w when iaref is equal to 1.235 v dc . in figure 8 all external capacitor values have a tolerance of 5 percent and the resistors have a tolerance of 1 percent, except the 3m w which has a tolerance of 5 percent. external to the A5191HRT, the filter exhibits a three-pole, high-pass filter at 624hz and a one-pole, low-pass filter at 2500hz.internally, the A5191HRT has a high-pass pole at 35hz and a low-pass pole at 90khz. the low-pass pole can vary as much as 30 percent. the input impedance of the entire filter is greater than 150m w at frequencies below 50khz. figure 8: receive filter schematic
7 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 4 4 . . 5 5 o o s s c c i i l l l l a a t t o o r r the A5191HRT requires a 460.8khz clock signal on oxtl. this can be provided by an external clock or external components may be connected to the A5191HRT internal oscillator. 4.5.1 internal oscillator option the oscillator cell will function with either a 460.8khz crystal or ceramic resonator. a parallel resonant ceramic resonator can be connected between oxtl and ixtl. figure 9 illustrates the crystal option for clock generation using a 460.8khz (i percent tolerance) parallel resonant crystal and two tuningcapacitors. the actual values of the capacitors may depend on the recommendations of the manufacturer of the resonator. typically, capacitors in the range of 100pf to 470pf are used. 4.5.2 external clock option it may be desirable to use an external 460.8khz clock as shown in figure 10 rather than the internal oscillator because of the high cost and low availability of ceramic resonators. in addition, the A5191HRT consumes less current when an external clock is used. minimum current consumption occurs with theclock connected to oxtl and ixtl connected to v ss . figure 9: crystal oscillator figur e 10: oscillator with external clock 5.0 ordering information the A5191HRT is available in a 28-pin plastic leaded chip carrier (plcc) and 32-pin low-profile quad flat pack (lqfp). use the following part number when ordering. contact your local sales representative for more information: www.amis.com/sales . p p a a c c k k a a g g e e p p a a c c k k a a g g e e t t y y p p e e p p a a r r t t n n a a m m e e o o r r d d e e r r i i n n g g c c o o d d e e * * 32-pin lqfp standard (non-pb-free) A5191HRTl 12197-503-xtp 28-pin plcc standard (non-pb-free) A5191HRTp 12197-504-xtp 32-pin lqfp green/rohs compliant A5191HRTlg 12197-507-xtp 28-pin plcc green/rohs compliant A5191HRTpg 12197-508-xtp *the part number extension -xtp refers to the device being shipped as tape and reel. the suffix -xtd refers to shipment in tubes or tray. table 4: ordering codes
8 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 6.0 electrical specifications table 5: absolute maximums s s y y m m b b o o l l p p a a r r a a m m e e t t e e r r m m i i n n . . m m a a x x . . u u n n i i t t s s t a ambient -40 +85 c t s storage temperature -55 150 c v dd supply voltage -0.3 6.0 v v in , v out dc input,output -0.3 v dd +0.3 v t l re-flow solder profile per ipc/jedec j-std-020c c table 6: dc characteristics s s y y m m b b o o l l p p a a r r a a m m e e t t e e r r v v d d d d m m i i n n . . t t y y p p . . m m a a x x . . u u n n i i t t s s v il input voltage, low 3.0 - 5.5 0.3*v dd v v ih input voltage 3.0 - 5.5 0.7*v dd v v ol output voltage, low (i ol = 0.67ma) 3.0 - 5.5 0.4 v v oh output voltage, high (i oh = -0.67ma) 3.0 - 5.5 2.4 v c in input capacitance analog inputirxa digital input 2.9 25 3.5 pf i il/ih input leakage current + 500 na i oll output leakage current + 10 m a i dd power supply current (rbias = 500k w , iaref = 1.235v) 3.3 5.0 330 400 450 600 m a iaref analog reference 3.3 5.0 1.2 1.235 2.5 2.6 v icdref* carrier detect reference (iaref - 0.08v) 1.15 v ocbias comparator bias current (rbias = 500k w , iaref = 1.235v) 2.5 m a *the hart specification requires carrier detect (ocd) to be active between 80 and 120 mv p-p . setting icdref at iaref - 0.08 v dc will set the carrier detect to a nominal 100 mv p-p . v dd = 3.0v to 5.5v, v ss = 0v, t a = -40c to +85c cautions: 1. cmos devices are damaged by high-energy electrostatic discharge. devices must be stored in conductive foam or with all pins shunted. precautions should be taken to avoid application of voltages higher than the maximum rating. stresses above absolute maximum ratings may result in damage to the device. 2. remove power before insertion or removal of this device.
9 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet table 8: modem characteristics v dd = 3.0v to 5.5v, v ss = 0v, t a = -40c to +85c p p a a r r a a m m e e t t e e r r m m i i n n . . t t y y p p . . m m a a x x . . u u n n i i t t s s demodulator jitter conditions 1. input frequencies at 1200hz + 10hz, 2200hz + 20hz 2. clock frequency of 460.8khz + 0.1% 3. input (hlxa) asymmetry, 0 12 % of 1 bit table 9: ceramic resonator - external clock specifications v dd = 3.0v to 5.5v, v ss = 0v, t a = -40c to +85c p p a a r r a a m m e e t t e e r r m m i i n n . . t t y y p p . . m m a a x x . . u u n n i i t t s s resonator tolerance frequency 460.8 1.0 % khz external clock frequency duty cycleamplitude 456.2 40 460.8 50v oh - v ol 465.4 60 khz %v table 7: ac characteristics v dd = 3.0v to 5.5v, v ss = 0v, t a = -40c to +85c p p i i n n n n a a m m e e d d e e s s c c r r i i p p t t i i o o n n m m i i n n . . t t y y p p . . m m a a x x . . u u n n i i t t s s irxa receive analog input leakage current frequency - mark (logic 1)frequency - space (logic 0) 1190 2180 1200 2200 + 150 12102220 na hzhz orxaf output of the high-pass filter slew rate gain bandwidth (gbw)voltage range 150 0.15 0.025 v dd - 0.15 v/ m s khz v/ m s irxac carrier detect and receive filter input leakage current + 500 na otxa modulator output frequency - mark (logic 1) frequency - space (logic 0) amplitude (iaref 1.235v)slope loading (iaref = 1.235v) 30 1196.9 2194.3500 2.79 hz hzmv p-p mv/ m s k w orxd receive digital output rise/fall time 20 ns ocd carrier detect output rise/fall time 20 ns the modular output frequencies are proportional to the input clock frequency (460.8khz).
10 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r - - r r e e v v . . 2 2 . . 0 0 , , m m a a r r . . 0 0 5 5 www.amis.com a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 7.0 mechanical specifications s s y y m m b b o o l l m m i i n n . . n n o o m m . . m m a a x x . . a .165 .172 .180 a1 .099 .101 .110 d .485 .490 .495 d1 .450 .452 .455 d2 .390 .420 .430 d3 .300 ref e .485 .490 .495 e1 .450 .452 .455 e2 .390 .420 .430 e3 .300 ref e .050 bsc figur e 1 1: 28 lead plcc
a a 5 5 1 1 9 9 1 1 h h r r t t a a m m i i s s h h a a r r t t ? ? m m o o d d e e m m data sheet 11 a a m m i i s s e e m m i i c c o o n n d d u u c c t t o o r r www.amis.com devices sold by amis are covered by the warranty and p atent indemnification provisions appearing in its terms of sale only. amis makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from p atent infringement. amis makes no warranty of merchant ability or fitness for any purposes. amis reserves the right to discontinue production and change specifications and prices at any time and without notice. ami semiconductor's products are intended for use in commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by amis for such applications. copyright ?005 ami semiconductor, inc. figure 12: 32 lead lqfp s s y y m m b b o o l l m m i i n n . . n n o o m m . . m m a a x x . . a - - 1.60 a1 0.05 0.10 0.15 a2 1.35 1.40 1.45 d 9.00 bsc d/2 4.50 bsc d1 7.00 bsc e 9.00 bsc e/2 4.50 bsc e1 7.00 bsc l 0.45 0.60 0.75 e 0.80 bsc b 0.30 0.37 0.45 c 0.09 - 0.20 ccc - - 0.10 ddd - - 0.20

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